Stage - Development of an FPGA based multiple CAN System

Internship project at John Cockerill Defense:

The goal of this thesis is to develop a proof-of-concept of a multiple CAN Bus bridge based on a Xilinx FPGA technology (e.g. zynq ultrascale+). The system should interface up to 8 CAN Bus, with configurable speed and configurable protocol through a single CAN line. The proof-of-concept shall be developed on a Xilinx development board.The student will start by understanding the CAN Bus protocol, then the architecture and the integration of IPs in a Xilinx FPGA.The student will do some research on existing IP.

The student will define and evaluate the development boards and FPGA needs.The student will design a customized FPGA bitstream integrating a configurable CAN Bridge. The student will validate the communication using simulation testing tools (VHDL and/or UVM testbench).The student will test the CAN bridge on a development board and validate the functions and the stability of the solution. Once the bridge concept is validated, the student will develop a penta-CAN bus version and a octoCAN bus version.

The student need to be avaible for at least 3 months. 

Profile : 

• Student in electronic/electro-mechanical engineering with an master's degree education level
• The student need to understand english and french